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# GATE Electronics and Communication Test Paper Online

 Test Name GATE Electronics and Communication Test Paper Subject GATE Test Type MCQs Total Question 40 Total Marks 80 Total Time 40 Minutes Test Help For M.Tech Admissions Government Jobs Post-Graduate Engineering Admissions Engineering Jobs

GATE Electronics and Communication Engineering is an amalgamation of networking, electronics, transmitting and receiving of information. All the topics most important for students which you have studied for GATE Electronics Engineering (ECE) exams. Candidates may note that the Syllabus for GATE ECE also be prepare according to the given Pattern officially. We also mange best preparation question MCQs test with answers for better result in jobs Test, admissions, entry test etc.

## GATE

1. The pole zero diagram Z(s) = V(s)/1(s) is shown in figure., i(t) = cos t, v(t) is given by: Question 1 of 40

2. Figures given simple equivalent ckts for CE and CB transistors. Given R = 2500Ω, k1 = 100, the value of r and k2 are respectively given by

Question 2 of 40

3. Steady state is reached with S open, S is closed at t = 0. At t = ∞ the voltage marked v is given by: Question 3 of 40

4. A parallel RLC circuit has a resonance frequency f0 = 106 Hz, Q = 100. The frequency at which the impedance becomes o.707 Zmax is given by:

Question 4 of 40

5. The pc contains 0450 H and Sp contains 08D6H. What will be the content of pc and Sp following a CALL to subroutine at location 20 AF H?

Question 5 of 40

6. The logic operation of two combination at circuits shown in the figures above

Question 6 of 40

7. An FM signal with a modulation index 9 is applied to a frequency tripler. The modulation index in the output signal will be:

Question 7 of 40

8. The gain margin of a system with with open loop transfer function
G(s) H(s) = 2(1+s)/s2 is:

Question 8 of 40

9. A p.d. of 300V is applied to a series combination of 3μ fd and 9μ fd capacitors. The charge on each capacitor is:

Question 9 of 40

10. The number of bits in binary PCM system is increased from n to n + 1, As a result the signal to quantization  noise ratio will approve by a factor

Question 10 of 40

11. The assembly language instruction called MACRO is:

Question 11 of 40

12. An eight bit digital data 10101100 is fed to an ADC. The reference voltage is + 10 Volts. The analog output voltage will be:

Question 12 of 40

13. What value of L needed with AC of 20 pF for an oscillatory frequency of 110.7 MHz?

Question 13 of 40

14. A loop produces a maximum e.m.f. of 150 volts when rotated at 60 rev/sec in a field of magnetic induction 5000 gauss. The dimensions of the loops are:

Question 14 of 40

15. The kinetic energy and the dc Brogile wavelength  of an electron that falls through a potential of 500V is:

Question 15 of 40

16. In a transistor, hfe = 450 = 50, hie = 830Ω, hoe = 10-4 mho. Its output resistance when used in CB configuration is about:

Question 16 of 40

17. The response to a step signal u(t) is given by Z - 2e-2t. Then the response to the impulse signal 2 δ(t) is given by:

Question 17 of 40

18. The leakage current in CE configuration may be around:

Question 18 of 40

19. For good stabilised brasing of the transistor of the CE amplifier we should have:

Question 19 of 40

20. In a uniformly doped abrupt P-N junction the doping level of n side is four times the doping level of p-side. The ratio of the depletion layer width is:

Question 20 of 40

21. Consider the Bode magnitude plot shown in figure below. The transfer function H(s) is: Question 21 of 40

22. A parity check usually can defect:

Question 22 of 40

23. For a narrow band noise with Gaussian Gradrature components, the probability density function of its envelope will be:

Question 23 of 40

24. The Laplace transformer of e-atf(t) is:

Question 24 of 40

25. A driving point impedance:
Zd(s) = V(s)/1(s) = s+1/s+2
The system is initially at rest. For a voltage signal of unit step, the current i(t) through Zd is given by

Question 25 of 40

26. A logical expression in the sum of produced (SOP) is suitable for implementation using

Question 26 of 40

27. A first order system initially at rest has for a signal u(t), the response 1-e-t. If the signal is 2u(t) cos (t), the response will be:

Question 27 of 40

28. In the ckt V0 is given by: Question 28 of 40

29. The step response of RC series circuit is of the form:

Question 29 of 40

30. The range of signed decimal numbers that can be represented by 6-bit is complement numbers is:

Question 30 of 40

31. An R-C ckt initially at rest has a step signal. The response v(t) across C is v(t) = 1 - e-at If now there is initial voltage on C of 2 volts for the same step signal, v(t) is now

Question 31 of 40

32. The figure of merit fT in a Bipolar junction Transister denotes the frequency at which the

Question 32 of 40

33. If the number of bits per sample in PCM system is increased from improvement in signal to quantisation noise ratio will be:

Question 33 of 40

34. In the given circuit, the voltage Vc across C at time t = ∞ is Question 34 of 40

35. The number of forward paths in the signal flow diagram shown below are: Question 35 of 40

36. The ckt shown in the figure below represents Question 36 of 40

37. Temperature coefficient of resistivity of inchrome wire is of order of:

Question 37 of 40

38. Which of the following has a lowest resistivity?

Question 38 of 40

39. For the given ckt, the time constant RC = 1 ms. The voltage v i(t) = √2sin 103t. The output voltage v0(t) is equal to: Question 39 of 40

40. Given G(s) H(s) = K/s(s+1)(s+3), the point of intersection of asymptotes of the root loci with the real axis is:

Question 40 of 40

 Test By Subject GATE Test By Topics Electronics and Communication Engineering